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Inputs latched into PORTCL on any active edge on STRA. Normal output port. Unaffected in handshake modes Driven as outputs if STRA at active level. Follows DDRC if STRA not at active level. Normal output port. Unaffected in handshake modes NOTE: 1. Set by active edge on STRA $1002 RESET 7 STAF 0 MOTOROLA 4-4 6 STAI 0 5 CWOM 0 4 HNDS 0 3 OIN 0 PARALLEL I/O 2 PLS U 1 EGA 1 0 INVB 1 PIOC MC68HC11A8 TECHNICAL DATA STAF — Strobe A Interrupt Status Flag This bit is set when a selected edge occurs on strobe A.

Due to data direction register control of SPI outputs and the port D wire-OR mode (DWOM) option, the SPI system can be configured in a variety of ways. Systems with a single bidirectional data path rather than separate MISO and MOSI paths can be accommodated. Since MC68HC11A8 SPI slaves can selectively disable their MISO output, a broadcast message protocol is also possible. 4 SPI Registers There are three registers in the serial peripheral interface which provide control, status, and data storage functions.

In a variation of this output handshake protocol, STRA is also used as an output-enable input, as well as an edge-sensitive acknowledge input. The MCU places data on the port C output lines and then indicates stable data is available by asserting the STRB line. The external device then processes the available data and pulses the STRA line to indicate that new data may be placed on the port C output lines. The active edge on the STRA line causes the STRB line to be deasserted and the STAF status flag to be set.

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68HC11 Technical Docs


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